In recent years, with an improvement in the integration of a semiconductor device and an increase in the aspect ratio of a bit line pattern, gap fill property of an interlayer insulating film has become important. An SOD (spin on dielectric) material is used to improve the gap fill property. Since the SOD material is coated by a spin method, the gap fill characteristics are improved. However, since the SOD material contains Si—H—N, it changes to SiO2 during the annealing process. In this case, during the annealing process, an SOD crack occurs due to the characteristics of the SOD material. In order to solve the problem of the SOD crack, the high-temperature annealing process needs to be performed in an atmosphere of H2/O2 at a temperature of 500° C. or more. However, the high-temperature annealing process oxidizes the tungsten layer, which is the bit line electrode layer.
In order to prevent the oxidation of the tungsten layer a method of not performing the etching process, which forms the spacers after the lining insulating film is deposited, has been proposed.
FIGS. 1A to 1C are cross-sectional views illustrating a method of manufacturing a semiconductor device according to the prior art.
FIG. 1A shows a method of forming a storage node contact hole without performing the etching process that forms the spacers. In the method shown in FIG. 1A, a first interlayer insulating film 110 is formed over a semiconductor substrate 100 having landing plug contacts 105 provided therein. Then, a bit line pattern 123 is formed over the first interlayer insulating film 110. In this case, the bit line pattern 123 included stack structure of a bit line electrode layer 115 and a bit line hard mask layer 120.
The first interlayer insulating film 110 of an oxide film, the bit line electrode layer 115 of a tungsten layer, and the bit line hard mask layer 120 of a nitride film.
Referring to FIGS. 1B and 1C, a lining insulating film 125 having a predetermined thickness is formed over the entire surface including the surface of the bit line pattern 123. The lining insulating film 125 may be formed of a nitride film. Then, a second interlayer insulating film 135 is formed over the entire surface of the lining insulating film 125 formed over the bit line pattern 123.
Subsequently, the second interlayer insulating film 135 is etched to form storage node contact holes 140 through which the landing plug contacts 105 are exposed.
In this method, as described above, a process of etching the lining insulating film 125 is omitted, and the tungsten layer, which is the bit line electrode layer 115, is covered with the nitride film, which is the lining insulating film 125, thereby making it possible to prevent the oxidation of the tungsten layer. However, the lining insulating film 125 that remains after the etching process, which forms the storage node contact holes 140, serves as an etching barrier, and causes a problem in that the electrode contact holes are not opened.
In the method of manufacturing a semiconductor device according to the prior art, when the high-temperature annealing process is performed to prevent the SOD crack, the tungsten layer, which is the bit line electrode layer, is oxidized. When the nitride film, serving as a capping layer, is formed over the entire surface of the bit line pattern in order to prevent the oxidation of the bit line electrode layer, the nitride film serves as an etching barrier during a subsequent process of forming storage node contact holes, which causes a problem in that the storage node contact holes are not opened.